Analog & Mixed-Signal Senior Layout Design Engineer (eInfochips)
- Ontario
- Permanent
- Temps-plein
- Design and development of transistor-level analog and mixed signal layout.
- Device/block level floorplan, placement, routing, and physical verification.
- Troubleshoot physical verification issues to get clean and desired results.
- Creating and reviewing layout documents to ensure they meet quality standards and are delivered on time.
- MSEE or BSEE with a minimum of 7 years of related experience.
- In depth familiarity with layout of analog and mixed signal CMOS circuits.
- Experience in development of SERDES subcircuit layout (ie. RX, TX, PLL, etc.).
- Experience in the following layout design techniques:
- Optimization for signal integrity (ie. clock/data routes, differential routing, shielding).
- Implementation of ESD design constraints, latch-up risk mitigation.
- Familiarity with custom digital layout (logic cell layout and associated logic path routing).
- Layout design for reliability (ie. EM, IR, etc.).
- Design to optimize parasitic layout effects (ie. matching, reliability, proximity effects, etc.).
- Familiarity in design for porting techniques.
- Full custom analog layout design tool: Custom Compiler (or equivalent).
- Verification tools: ICV, Calibre, Star-RCXT, PERC.
- Experience in working with Jira/Atlassian (or other such) tools.
- Strong working knowledge of MS Office Suite of applications.
- Experience with TCL, SKILL, PERL, Python or other language scripting is a plus.
- Bachelor’s degree in computer science, computer engineering, or a related technical field—or equivalent practical experience